Month: June 2020

Adjusting Bond Force Settings on Manual MPP and K&S Wire Bonders

25th June 2020

Adjusting Bond Force Settings: The adjustment of the process bond force parameters for 1st and 2nd bonds on MPP iBond Series Manual Wire Bonders and Kulicke & Soffa “legacy” 4500 Series Wire Bonders (IKB-009).
  • During the bonding cycle, the bond force is applied while ultrasonic energy is been applied to the wedge/capillary. The static bond force is a combination of the Static Bond force and also additional bond force applied from the Force coil.

45xx Series:

  • The Force coil is controlled via the 1st Bond and 2nd Bond potentiometer dials on the left hand side front panel:

How to adjust the bond force on MPP iBond 5000 or MPP/K&S (legacy) 4500 Series Wire Bonders

iBond5000 Series:

  • The Force coil is controlled via 1st and 2nd Bond Force adjustment on the touch screen panel:
How to adjust the bond force on MPP iBond 5000 Wire Bonders

To adjust the Bond Force:

  • Ensure the Bonder is in Reset Position; confirm this by ensuring the ‘1st Bond LED’ is illuminated (4500 series) or ‘Reset Position’ is displayed in the status window (iBond series).
  • The ‘Set Up/Reset’ switch located on the right hand side panel (4500 series) or ‘Setup’ slider within the iBond5000 menu section (iBond series) are showing SETUP.
  • With the bonder in SETUP the machine will drive the Force Coil constantly at both 1st and 2nd bond forces depending on the machine cycle position.
Setting the Bond Force on K&S or MPP Manual Wire Bonders

  • Set both 1st and 2nd Search adjustment to zero.
  • Press and hold the ‘Semi/Auto Chessman button’. The bond head will move into the ‘1st Search height’.
  • Using a suitably scaled gram gauge lift the bond head under the wedge/capillary. As the bond head starts to rise, read the value on the gram gauge.
  • This measured value is the bond force for the 1st Bond; adjust the ‘1st Bond Force adjustment’ until a desired force is measured on the gram gauge.
  • Release the ‘Semi/Auto Chessman button’, the bond head will move to the ‘Loop Height’.
  • Press and hold the ‘Semi/Auto Chessman button’. The bond head will move into the ‘2st Search height’. Again, lift the bond head with the gram gauge under the wedge/capillary until the bond head starts to rise.
  • This measured value is the bond force for the 2nd Bond; adjust the ‘2nd Bond Force adjustment’ until a desired force is measured on the gram gauge.
  • Release the ‘Semi/Auto Chessman button’, the bond head will move to the ‘Reset Height’.
  • Return the ‘Set Up/Reset’ switch to the mid position.
Measuring the Bond Force on K&S or MPP 4500 Manual Wire Bonders

For further information on our range of MPP Manual Wire Bonders, please click HERE.





Adam Marshall


02 June 2017


IKB009 Rev. 3


Die Attach Process: Guidance & Setup

24th June 2020

An introduction to the die attach process, and factors to be taken into consideration when setting up or reviewing this process (IKB-072).

When setting up a die attach process, some of the factors that need to be taken into account are:

  • Die Type & Size
  • Die and Substrate Materials
  • Substrate Bondability
  • Joining Agent
  • Application Method
  • Cure / Reflow Method

Die Type & Size:

There are only two options for die type: flat or bumped. If the die is flat, the next consideration is to decide if electrical conductivity is required. If so, then the choice is between using a conductive epoxy, a solder, or a silver sinter material (usually used mostly in high power applications). If electrical conductivity is not necessary, an adhesive will be used. Generally, the adhesive will be either an epoxy or an acrylate (for compliancy when the die is large).

If the die is bumped (for examples, BGA or Flip Chip), then it is usually a choice between an Anisotropic Conductive Adhesive (ACA) or soldering the bumped die to the substrate and then applying an Underfill (for more detailed information on Inseto’s ACA materials, please visit HERE). Using an ACA requires precise alignment of the die as the ACA is applied to the substrate prior to attaching the die, so the die and substrate pads must be aligned just prior to placement. Underfills are applied after attaching the die to the substrate, so there is no need for alignment, but the downside is that there is an extra process involved (reflowing the solder balls to attach the die, and then curing the Underfill material after it has been applied).

Die Attach Process, Bonding of Die to Leadframes

Die and Substrate Materials:

The die material, in the majority of applications, will be silicon, but other materials are also used, such as GaAs, InP, and GaN. These compound semiconductor materials tend to require more heat dissipation than silicon, so non-conductive adhesives tend not be used in these applications.

On the other hand, there is a wide range of substrate materials to choose from – ceramic (alumina, AlN, BeO, Quartz, etc.), FR4 (too many variations to mention), softboard (Duroid, epoxy tape, PI flex, etc.), and traditional semiconductor leadframes. Quite often the deciding factor will be influenced by other criteria: cost, reliability, availability, etc.

Die Attach Substrate Materials

Substrate Bondability:

In general, the surface of the die does not require any form of preparation in order to achieve good adhesion. However, it can be a very different story when it comes to the substrate material used in the die attach process! As a broad category, it is straightforward when bonding to ceramics. For FR4 and softboard materials, there is a wide range of surface finishes, not all of which are easy to bond to (cost can be a big factor when choosing substrate material, and it’s not always a case of “the cheaper the better”, because that can lead to extreme variability in surface finish). In that case, some form of pre-treatment / cleaning may be necessary. Options include laser ablation, low-pressure plasma, atmospheric plasma, and corona treatment, and for cleaning the choice is between aqueous or solvent cleaning. Each has its advantages and disadvantages, ranging from process cost (i.e. time) to equipment cost, and whether the pre-treatment can be an in-line one, or on a batch-by-batch basis.

It’s also worth noting that cleanliness is critical for any form of die attach / joining process, whether it’s adhesive bonding, soldering, or silver sintering. If pre-treatment is necessary, then it can also be a requirement for another cleaning process after the pre-treatment process, for example when laser ablating.

Die Attach Surface Preparation

Joining Agent

As stated above, the first consideration when selecting the die attach material, is to decide if electrical conductivity is necessary. If so, then the choices are solder, conductive adhesive, or silver sintering. Best results are achieved with solder or silver sintering. The electrical conductivity of an adhesive will never be as good as that of solder or silver sintering, simply due to the fact that adhesives when cured become plastic, and this will reduce the electrical conductivity because plastic is a poor conductor of electricity, even if the bond line thickness is very fine.

Solder has been used for many decades to make the electrical connection between the die and the substrate – it is a well-established process! However, solder is available in solid form as preforms, ribbon and wire, or suspended in a liquid form as paste. Solder preforms can be supplied in bulk (glass vials), in Waffle Packs, or on Tape-on-Reel. The latter two are used in automated processes, but they come at an additional cost of putting the preforms into the pack / reel. Solder ribbon is very useful for R&D and prototype assembly – it saves on the cost of a stamping tool – but the ribbon must be cut to size before being applied. Solder wire is used mainly in power applications, and requires some type of feeder mechanism to apply and melt just the right amount of solder onto the die attach area. Solder paste contains a flux to improve the wettability of the solder, and this has to be removed after solder reflow, another process to be carried out, with the additional cost it brings (time and equipment).

To make an adhesive electrically conductive requires a conductive filler (as mentioned earlier, adhesives by themselves do not conduct electricity, they are inert plastics once cured). The filler is usually silver (particles, flakes, or spheres in some rare cases), although gold has also been used in the past – before the price of gold increased substantially some years ago! While not as electrically conductive as solder, conductive adhesives tend to be less expensive than solder and can normally be cured at lower temperatures than solder, thereby imparting less stress into the materials being bonded.

Silver sintering is a relatively new process, used mainly to bond high-power semiconductors, so reliability data is limited at the moment. It’s based on a solid-state diffusion process where silver particles are fused to each other and to the metalisation on the die and the substrate. Therefore it can only be used when the surfaces of the materials being joined are metalised (and free of oxides – pre-treatment?). It is generally a temperature and pressure (~ 10 MPa) process, although some pressure-less materials are currently under evaluation. Sintering temperatures are comparable to, or lower than, typical SAC-reflow temperatures. Similar to solvent-based materials, silver sinter materials require a drying stage prior to the final firing process.

Where electrical conductivity is not a requirement for the die attach process, then the only choice is adhesive bonding! The question then becomes, is thermal conductivity (but electrical isolation) a requirement? If so, then a thermally conductive filler material is added to the adhesive instead of silver. Generally these fillers are alumina, aluminium nitride, or boron nitride (despite the fact that in sheet form alumina is significantly less thermally conductive than aluminium nitride, this difference is significantly negated in particle form). If thermal conductivity is not a requirement, then a special filler in not needed. There is an extensive range of non-conductive die attach adhesives on the market, so other factors such as cure time, ease-of-application, MOQ and container size will influence the decision on which adhesive to choose. For more information on Inseto’s range of die attach adhesive, please visit HERE.

Solder Preforms

Application Method:

This will be heavily influenced by the joining agent, and the substrates being joined. Solder preforms (and cut ribbon) are either placed by hand (R&D, prototyping) or by die bonders, also known as pick-and-place machines, for high volume production. The cost of die bonders is dictated by the required UPH and repeatable placement accuracy. Solder paste is either dispensed or screen / stencil printed, depending on the size and topography of the substrate.

Die attach adhesives will be either dispensed, jetted, stamped, or screen / stencil printed. Sometimes the nature of the adhesive will dictate the application method – some viscous adhesives are easier to print than to dispense, while less viscous ones are more difficult to print as they are very difficult to control between the act of printing and the actual component placement process (especially for applications with a large number of components on a substrate). Adhesives that contain abrasive fillers, while it is definitely possible to jet them, will cause damage to the jetter, necessitating the replacement of very expensive equipment after short periods of operation. Finally, adhesives that are susceptible to moisture cannot be stamped or printed, unless in a controlled atmosphere, as it is possible for them to be exposed to moisture for extended periods of time.

Silver sintered materials for the die attach process are applied in paste form, or as pre-dried films. The pastes are screen / stencil printed, a well-established process in use for many years, while the films contain a special sintering inhibitor that must be dried off.

Die Attach Adhesives

Cure / Reflow Method:

Solder, no matter what form it is supplied as, will be reflowed in order to get it to join the two substrate materials together. Reflow means that heat is applied to raise the temperature of the solder to its melting point in order to get it to soften, dwelling at that temperature for a specific period of time to form the bond, and then cooling the assembled parts down to room temperature for the next stage of the process. Regarding the melting step, solders will either be eutectic alloys, or have a melting temperature range. Eutectic alloys go from solid to liquid instantaneously at a given temperature (for example, 80%Au 20%Sn turns liquid at 280°C – it is solid at 279°C!), and so are desirable from a control and consistency point of view. Alloys with a melting point range (and this accounts for most alloys) can be difficult to control – for example, 70%Pb 27%Sn 3%Ag (granted, not a commonly-used alloy!) melts between 179°C and 312°C, which will mean significant variation between batches. For more detailed information on Inseto’s range of solder alloys, please visit HERE. Reflowing solder paste has an added wrinkle in that a relatively lengthy dwell time is required during the ramp-up process in order to dry off the flux contained in the paste. This is especially true for applications that contain a large thermal mass – it takes even longer for all the components to reach the desired temperature.

Curing die attach adhesives generally falls into two categories – using heat just like when soldering (but at lower temperatures) or using UV light (or sometimes a combination of the two!). This is true whether the adhesive is electrically conductive, thermally conductive, or neither! Curing by heat seems relatively straightforward: put the joined parts in an oven for a defined period of time, with the oven set to a defined temperature. However, it’s not quite as simple as that. If a technical data sheet says that an adhesive must be cured at say 100°C for 30 minutes, this does not include the time it takes for the adhesive to get to 100°C. So taking the assembled parts out of the oven after 30 minutes means that the adhesive will NOT be fully cured. This is especially important if one or both parts are metal – because most metals conduct heat very well, it will take even longer for the adhesive to reach the desired temperature.

Care also needs to be taken to ensure that the parts actually reach the desired temperature. Heat uniformity in an oven can vary, with some “hot” and “cold” spots present. For example, if the oven is set to 100°C, there will probably be areas in the oven where the actual temperature is 102°C, and some where it is 98°C (or even lower). So if a data sheet specifies a minimum cure temperature of 100°C, and the parts being bonded are in an area of the oven that is only at 98°C, the adhesive will never cure, even if the parts are left in the oven for hours! So it’s highly recommended that curing is not carried out at the lower end of the process window. Using thermocouples when setting up the process for heat curing is strongly advised. (This is also true for the soldering process.)

Curing with UV also needs some careful deliberation to get the process right. The first consideration is the type of lamp. In general, there are two types of lamp used to cure a UV adhesive: older style mercury bulb lamps and newer style LED lamps. The mercury bulb lamps cost less (and sometimes a lot less) than LED lamps, but the cost of ownership is much higher! Once a mercury bulb lamp is switched on at the beginning of a shift, it must remain on for the whole shift (8 hours typically), even if it’s not actually curing adhesive the whole time. This is because it has a cooling down period, once switched off, of 15 to 20 minutes, before it can be switched back on. Because these bulbs only have a lifetime of ~ 1,000 hours, they need to be replaced frequently, at cost of many hundreds of pounds. LED lamps do not have this problem, they cure on-demand so during an 8-hour shift, they may actually only be in operation for a fraction of that time. And because they have a lifetime of > 10,000 hours, on-going operational costs are significantly lower.

The other consideration concerns the wavelength of light that the adhesive needs to cure. “UV light” is a catch-all phrase that can actually be broken down into actual UV light and Visible light. UV lies below 380 / 400nm on the electromagnetic spectrum, while Visible light lies above 400nm (400nm is the generally accepted cut-off point between UV and visible light). So care needs to be taken to ensure that the lamp is tailored to the adhesive. Most adhesives will contain photoinitiators that allow curing to be done both by UV light and by VIS light, but this is not always the case. For more detailed information on Inseto’s range of UV lamps, please visit HERE.

Light Curing System for Epoxy Die Bonding





Eamonn Redmond


19 June 2020


IKB072 Rev. 1


Adhesives for Die Attach

19th June 2020

This is a guide to the different types of adhesives for die attach available from Inseto. Both traditional die attach adhesives (wire-bonded) and flip-chip (Z-axis) adhesives are previewed, with a brief overview of each adhesive. Comparison charts are also provided to help choose the most appropriate solution (IKB071).

Inseto supplies a range of non-conductive epoxies for various die attach applications found in microelectronic and related semiconductor applications. Non-conductive epoxies are used where the device requires no electrical transmission through the back of the die. Electrically conductive materials, also known as isotropic adhesives, are used where the device requires an electrical transmission through the back of the die. Thermally conductive die attach adhesives transmit heat but are electrically insulating.

The choice of adhesive type is usually dictated by the way the die has been designed, especially regarding electrical conductivity. However, for cost reasons, electrically conductive adhesives are only chosen where absolutely necessary, as they are significantly more expensive that non-conductive adhesives. A need for thermal conductivity often doesn’t become apparent until the first prototype parts are assembled and tested.

Note: All adhesives are 1-part, solvent-free.

Non Conductive and Conductive Die Attach Adhesive “Comparison Chart”:

Conductive and Non-Conductive Die Attach Adhesive "Comparison Chart"

Non-Conductive Die Attach Adhesives Overview:
DELO DUALBOND AD340An unfilled epoxy suitable for temperature-sensitive substrates (curing at 80°C in 30 minutes). Can be light-fixed in seconds for high-placement accuracy.
DELO DUALBOND AD761A fast-curing epoxy (3 minutes at 150°C) with excellent compliance for larger die applications. Can be light-fixed in seconds for high-placement accuracy. Very long pot life of 7 days.
DELO DUALBOND BS3770A B-Staged epoxy also suitable for lid attach. A-stage cured in 10 seconds using UV light, then B-Staged in the oven for 40 minutes at 150°C. Suitable for a flexible manufacturing process.
DELO MONOPOX DA255An unfilled epoxy ideal for fast-curing applications: 2 minutes at 150°C (or thermode cure in 6 seconds at 180°C). Very high die shear strength of 210 Newtons.
DELO MONOPOX DA587An unfilled epoxy ideal for fast-curing applications: 2 minutes at 150C. Longer than usual pot life of 5 days.
DELO MONOPOX DA588An unfilled epoxy ideal for fast-curing applications: 2 minutes at 150C. Ideal for Smart Card applications.
DELO DUALBOND LT354An unfilled epoxy suitable for temperature-sensitive substrates (curing at 80°C in 30 minutes). Can be light-fixed in seconds for high-placement accuracy.
DELO DUALBOND OB749An unfilled epoxy with independent heat-curing (60 minutes at 80°C) and light-curing (2 - 6 seconds at 60 mW/cm2) mechanisms. Complies with ESA (ECSS-Q-70 02) and NASA (ASTM E 595-93) outgassing requirements.
DELO DUALBOND OB786An unfilled epoxy with independent heat-curing (50 minutes at 80°C) and light-curing (4 seconds at 150 mW/cm2) mechanisms. Very high Tg of 179°C.
DELO DUALBOND OB787A high viscosity unfilled epoxy with independent heat-curing (60 minutes at 80°C) and light-curing (2 - 6 seconds at 60 mW/cm2) mechanisms. Very high Tg of 185°C.
DELO DUALBOND OB793A high viscosity unfilled epoxy with independent heat-curing (60 minutes at 80°C) and light-curing (5 - 10 seconds at 60 mW/cm2) mechanisms.
Conductive Die Attach Adhesives Overview:
DELO DUALBOND IC343A silver-filled epoxy that has an optional UV-curing capability; a 1 - 5 second UV tack-in-place followed by 30 minutes at 80°C; ideal for high-accuracy placement requirements; extremely low outgassing, meeting international HDD (Hard Disk Drive) requirements (>> ESA / NASA).
Thermally Conductive, Electrically Insulating Die Attach Adhesives Overview:
DELO MONOPOX TC2270Filled with aluminium nitride for enhanced thermal conductivity (1.7W / m*K). Very low temperature curing (90 minutes at 60°C). Meets JEDEC MSL1 requirements.

Anisotropic Conductive Die Attach Adhesive “Comparison Chart”:

Anisotropic Die Attach Adhesive "Comparison Chart"

All anisotropic (Z-axis) adhesives require both heat and pressure (usually from a thermode or on the die bonder, with the collet holding the die in place) in order to achieve electrical conductivity in the Z-axis. A typical pressure is 1 – 2 Newton’s / mm2, based on a 1mm-square die.

Anisotropic Conductive Adhesives Overview:
DELO MONOPOX AC265Filled with gold-over-nickel plated polymer particles, typical size of 2.5µm. Cures in 6 seconds at 200°C. Extended pot life of 2 weeks.
DELO MONOPOX AC268Filled with nickel particles, typical size of 5µm. Cures in 6 seconds at 190°C.
DELO MONOPOX AC6530Filled with nickel particles, typical size of 5µm. Cures in 1 second at 230°C.
DELO MONOPOX AC6545Filled with nickel particles, typical size of 5µm. Cures in 1 second at 230°C.

For more information on our range of Die Attach Adhesives, please click HERE.

A general overview of the various die attach processes can be found HERE.





Eamonn Redmond


15 June 2020


IKB071 Rev. 1


Inseto Sign Sales Agreement with LS Laser Systems

8th June 2020

Andover, United Kingdom Inseto, a leading technical distributor of equipment and materials, has been appointed by Germany-headquartered LS Laser Systems GmbH to distribute its products in the United Kingdom, Denmark, Finland, Iceland, Norway and Sweden.

LS Laser Trim Equipment
LS Laser Systems Laser Trim Equipment

LS Laser Systems’ products are used in the semiconductor, microelectronics, automotive and other advanced engineering sectors. Products include laser systems for thick- and thin-film circuit trimming as well as laser markers. Lasers are available that vary in power and wavelength from Near Infrared (NIR) to far ultraviolet (FUV), and many are controlled by the company’s proprietary LS-MaTriCS software.

Reinhard Ferstl, CEO at LS Laser Systems, comments: “Inseto is representing complementary equipment manufacturers and supplying materials into the sectors we serve. The company is also strong and has an excellent reputation for customer service in the UK and Nordic regions.”

Matt Brown, Director of Inseto, adds: “We’re delighted to be representing LS Laser Systems through our Equipment Division, in which we already have manufacturing and test systems from 11 other equipment manufacturers. This breadth of suppliers, along with our technical specialists’ expertise, is making us a go-to company for advanced manufacturing equipment and materials in advanced engineering sectors.”

For further information please visit: Download a PDF copy of this news release HERE.

Glossary of Wafer Probing Terms and Acronyms

2nd June 2020

I over F (1/f)1/ƒ noise occurs in almost all electronic devices (referred to as flicker noise). When designing or working with circuits for use with extremely weak (low level) signals, noise is an important consideration. As the switching voltage on devices reduces, the percentage of this signal become larger. Flicker noise is more prominent in FETs and bulky resistors. A "real world" amplifier will not only amplify the noise at its input, but will contribute its own noise to the signal. In devices such as hearing aids, this noise creates a popping sound not unlike the sound of popping corn.
3D Packaging3D packaging involves two or more components stacked vertically in a package in order to achieve a higher level of integration while using a smaller footprint. The integrated components may be either stacked packages or stacked chips. In the latter case, the chips are either wire-bonded along their edges or interconnected by way of Through-Silicon Via (TSV) technology.
Accelerated Lifetime Test (ALT)Accelerated Lifetime Testing stresses devices beyond actual operating conditions to physically and / or chronologically accelerate any potential causes of degradation. In this way, device lifetime and failure rates can be determined, and failure mechanisms can be analysed. This type of test is referred to as an accelerated lifetime test. Such tests are used to shorten the evaluation period and analyse mechanisms in detail.
AccuracyDetermined on one axis of motion by moving a specified distance and then measuring how accurately the device moved that distance. E.g. Direct a move in “X” of 15mm. Actual movement is 15.001mm. Accuracy would be ± 0.001mm
AM 1The air mass 1 spectrum of a light source is equivalent to that of sunlight at the earth's surface when the sun is at zenith.
Amperometric SensorA heterogeneous electron transfer as a result of an oxidation / reduction of an electro-active species at a sensing electrode surface. A current is measured at a certain imposed voltage of the sensing electrode with respect to the reference electrode. Analytical information is obtained from the current-concentration relationship at that given applied potential.
Anechoic ChamberA test chamber that performs 2 basic functions as part of an overall EMC (electromagnetic-compatibility) measurement system. They shield the DUT from ambient signals and absorb reflected signals generated inside the chamber.
AnodeThe electrode in an electrochemical cell or galvanic couple that experiences oxidation, or gives up electrons.
Arrhenius EquationIn accelerated lifetime modelling, when the stress parameter is the temperature, the acceleration factor may follow an Arrhenius equation where the acceleration factor is proportional to exp(-Ea/kT) with Ea being the activation energy, k the Boltzmann constant and T the temperature.
ASICApplication Specific Integrated Circuit
Assembly Test ChipA chip designed to evaluate the reliability and effect of assembly materials and processes, usually by electrical measurements made on terminals connected to the chip within the packages that are tested. The test chip may contain a variety of sensors to evaluate thermo-mechanical stresses, moisture, and other associated degradations.
Atomic Force Microscope (AFM)An instrument that allows for the measurement and high resolution mapping of both conducting and non-conducting surfaces. The instrument operates by scanning the sample with a sharp tip (typically micro-machined silicon nitride) attached to the underside of a microscale cantilever.
Automated Optical Inspection (AOI)Systems for inspecting electronic circuits (products, assemblies), identifying defects during the manufacturing cycle. CCD cameras are used to capture images which are compared to the characteristics of known good products, facilitating the identification of problems and allowing repair at earliest point and the lowest possible cost. Similar to WIS.
Automated Test Equipment (ATE)Automatic Test Equipment - Equipment designed to automatically analyse functional or static parameters of electronic assemblies in order to evaluate performance degradation. It may also be designed to perform fault isolation.
Balanced InputA differential input circuit pair with equal impedance to ground on each side. See Differential Input. The advantage over single-ended transmission is noise rejection over long distances of cabling.
Balanced OutputA differential output circuit pair with equal source impedance on each side. See Differential Output.
Ball Grid Array or Bumped Grid Array (BGA)A surface mount microelectronic package that uses an array of solder balls to provide electrical interconnect and physical mount to the next level of package such as a printed circuit board.
BandwidthThe measure of a circuit’s ability to pass a full amplitude signal over a range of signal frequencies. Normally measured between the point or points where the signal amplitude falls to -3dB below the pass band frequency.
Bipolar Junction Transistor (BJT)A three-terminal electronic device constructed of doped semiconductor material and may be used in amplifying or switching applications. Bipolar transistors are so named because their operation involves both electrons and holes. Charge flow in a BJT is due to bidirectional diffusion of charge carriers across a junction between two regions of different charge concentrations.
BLPBottom lead packages
BNCA type of coaxial connector used in situations requiring shielded cable for signal connections and / or controlled impedance applications.
BreakdownFailure of a material resulting from an electrical overload. The resulting damage may be in the form of thermal damage (melting or burning) or electrical damage (loss of polarisation in piezoelectric materials).
Burn-inThe process of electrically stressing a device, usually at an elevated temperature and voltage environment, for an adequate period of time in order to force component infant mortality failures or other latent defects before the unit is delivered to a customer. (See WLR.)
C4Controlled Collapsed Chip Connection
C5Controlled Collapsed Chip Carrier Connection
CalibrationA process of adapting a sensor output to a known physical quantity to improve sensor output accuracy.
CathodeThe electrode in an electrochemical cell or galvanic couple at which a reduction reaction occurs; in other words the electrode receiving electrons from an external circuit.
Cap WaferA wafer that is bonded to a device wafer intended to provide encapsulation to the devices.
Ceramic Ball Grid Array (CBGA)Integrated circuit package in which the input and output points are solder bumps arranged in a grid or area array pattern. CBGA devices utilise ceramic materials because of their low loss qualities, long life characteristics, and ability to withstand high operating temperatures and heat shock. For general application, the aluminium oxide (alumina) substrate is preferred because of its availability, low cost, good thermal expansion coefficient to most inks. Beryllia substrates with a high thermal conductivity may be used in high power circuitry.
CCACircuit Card Assembly
CCAPSCircuit Card Assembly and Processing System
CCGACeramic Column Grid Array
Column Grid Array (CGA) An integrated circuit package in which the input and output points are high temperature solder cylinders or columns arranged in a grid pattern.
Channel CrosstalkCoupling of a signal from one channel to another or any other output by conduction or radiation. Crosstalk is expressed in decibels (dB) at a specified load impedance and over a specific frequency range or ranges.
ChipAn uncased and normally leadless form of a microelectronic component that is either passive or active, discrete or integrated. It is the square or rectangular portion of a wafer sectioned from the wafer when the wafer processing is completed. Also referred to as a die. A chip is not ready for use until packaged and provided with external connectors.
Chip Scale Package (CSP)A single-die, direct surface mountable package with an area of no more than 1.2 X the original die area. CSPs are constructed from individual die with lead frame or substrates and are also fabricated at the wafer level. CSPs have the advantage of small size, low mass, reduced electrical parasitics and they can be fully tested.
Chip-On-Board (COB)A hybrid technology exclusively employing face-up-bonded chip devices interconnected to the substrate conventionally, i.e., by flying wires. A generic term for mounting an unpackaged silicon die directly onto the PCB. Connections are usually made by wire bonding.
Coaxial CableA cable that has one conductor (shield) completely surrounding the other (centre conductor), the two being coaxial and separated by an insulator. Standard industry types have a braided shield, or a semi-rigid copper or stainless steel shield material. Braided shield coaxial cable offers more physical flexibility but less shielding.
Cold SwitchingClosing the relay contacts before applying voltage and current, plus removing voltage and current before opening the contacts (Contacts do not make or break current.). Larger currents may be carried through the contacts without damage to the contact area since contacts will not arc when closed or opened.
Contact ResistanceExcess electrical resistance in series with the bulk conductor resistance of two contacting electrical conductors arising from the nature of contact geometry and properties of the contact surfaces.
CrosstalkThe undesirable interference caused by the coupling of energy between signal paths.
Cross-sensitivityThe influence of one measurement on the sensitivity of another measurement.
CV / IVCV (capacitance vs. voltage) and IV (current vs. voltage) measurements. Capacitance-Voltage (CV) measurement is one of the very basic measurements that can be done to characterise semiconductor devices. What is normally done is the device is hooked up to the parametric analyser instrument and CV graphs are plotted. With that data we can conclude the type of device, whether it’s a p type or an n type device and many other parameters. The main aim of the CV measurement is to extract the doping information of the diode.
Direct Chip Attachment (DCA)Techniques for connecting electronic integrated circuits to PCB's or substrates without the use of additional P/I structure such as wirebonds or leadframes. This includes packages commonly referred to as Flip Chip.
DieAn uncased and normally leadless form of a microelectronic component that is either passive or active, discrete or integrated. It is a square or rectangular portion of a wafer sectioned from the wafer when the wafer processing is completed. Also referred to as a chip.
DielectricAny material that is electrically insulating.
Dielectric Breakdown StrengthThe magnitude of an electric field necessary to cause significant current passage through a dielectric material.
DINDoes not specify any particular connector only that it meets a standard.
Dual In-line Package (DIP)A type of package with two rows of leads extending at right angles from the base and having standard spacing between leads and between rows of leads. DIP is a through-hole mounting package. DIPs can be made of ceramic and plastic, referring to as CERDIP and PDIP respectively.
DPMDefects per Million
Drift Gradual departure of the instrument output from the calibrated value. An undesired slow change of the output signal.
DSPDouble-side prober or Digital Signal Processing
DUTDevice Under Test
Dynamic characteristicsA description of an instrument's behaviour between the time a measured quantity changes value and the time the instrument obtains a steady response.
Dynamic errorThe error that occurs when the output does not precisely follow the transient response of the measured quantity.
Dynamic rangeThe ratio of the largest to the smallest values of a range, often expressed in decibels.
Electric Field [V/m]In simplest form, the potential difference between two points divided by the distance between the two.
Electrical BreakdownCondition in which, particularly with high electric field, a nominal insulator becomes electrically conducting.
ElectroluminescenceIn electrical engineering: the emission of visible light by a p-n junction across which a forward-biased voltage is applied. In electrochemistry: emission of light by a molecule which is being reduced or oxidised on a biased electrode. If the exciting cause is a photon, rather than an electron, the process is called photoluminescence. This is the theory behind Emission microscopy.
ElectrolyteA solution through which an electric current may be carried by the motion of ions.
Electromagnetic Interference (EMI)A term that defines unwanted electromagnetic radiation from a device that could interfere with desired signals in test or communication equipment. RFI (Radio Frequency Interference) and EMI are often used interchangeably.
EOTEnd of Test
EncapsulationSealing up or covering a circuit or electromechanical element for mechanical and environmental protection.
Electrostatic Discharge (ESD)The transfer of electrostatic charge between bodies (materials, components, etc.) at different electrostatic potentials caused by direct contact or induced by an electrostatic field.
FAFailure Analysis
F-type ConnectorA threaded medium performance coaxial signal connector typically used in consumer applications (TVs and VCRs). This connector is typically usable as high as 1GHz. It is inexpensive since the pin of the connector is actually the centre conductor of the coaxial cable.
Forced Air Convection (FAC)A type of reflow oven in which the principle heat transfer mechanism is convection, though some IR (infrared) conduction may be present. Also known as forced convection.
Failure MechanismA physical, chemical or other process that leads to failure. Some examples of failure mechanisms in MEMS include: stiction, creep, fatigue, wear, dielectric charging and breakdown.
Failure ModeA failure mode is the manner whereby a failure is observed. Generally, it describes the way in which the failure happens and its impact on device or system operation.
Failure Mode and Effect Analysis (FMEA)A systematic method for evaluating potential product or process failure modes and their impact on the product or process. FMEA is normal done on a form which facilitates the prioritisation and management of remedial actions to reduce the occurrence of failure modes or minimise their effects.
FARFailure Analysis Report
FatigueUsed to describe the failure of any structure caused by repeated application of stress over a period of time.
FCCFlat Conductor Cable
Flip Chip in Package (FCIP)An IC package in which the die is interconnected to the lead structure of the package as a Flip Chip.
Field Effect Transistor (FET)The FET relies on an electric field to control the shape and hence the conductivity of a channel of one type of charge carrier in a semiconductor material. FETs are sometimes called unipolar transistors to contrast their single-carrier-type operation with the dual-carrier-type operation of bipolar (junction) transistors (BJT).
Flip ChipA leadless, monolithic structure containing microelectronic elements that is designed to electrically and mechanically interconnect to a base material through the use of conductive bumps located on its face.
FloatingThe condition where a common mode voltage exists, or may exist, between earth ground and the instrument or circuit of interest. Low side of circuit is not at earth potential.
Fibre Optic Operational Wavelengths (FOOW)850 nm - multimode fibre 1310 nm - multi and single mode fibre 1550 nm - single mode long haul and transoceanic fibre 1625 nm - proposed for in-service monitoring
Forward BiasThe conducting bias for a p-n junction rectifier that assures electron flow to the n side of the junction.
Frequency SpectrumRelationships and Typical Applications 108 nm - 3 x 109 Hz (microwave radio frequencies) 109 nm - 3 x 108 Hz (UHF frequencies) 1010 nm - 3 x 107 Hz (VHF frequencies) 3 x 1011 nm - 1000 kHz (AM Broadcast radio frequencies) 1014 nm - 3000 Hz (audio frequencies) 5 x 1015 nm - 60 Hz (electrical power frequency)
HALTHighly Accelerated Life Testing
HFHigh Frequency
ICIntegrated Circuit
In-Circuit Test (ICT)A component-by-component test to verify proper component placement and orientation and to ensure that components meet specifications.
Insulated Gate Bipolar Transistor (IGBT)A three-terminal power semiconductor device, noted for high efficiency and fast switching. It switches electric power in many modern appliances: electric cars, variable speed refrigerators, air-conditioners, and even stereo systems with switching amplifiers. Since it is designed to rapidly turn on and off, amplifiers that use it often synthesize complex waveforms with pulse width modulation and low-pass filters.
Insulation ResistanceThe Ohmic resistance of insulation. It degrades quickly as humidity increases. Lower insulation resistance provides a path for leakage current to ground. This is very critical when making measurements on semiconductor components where picoamp measurements are being made.
InterposerAn intermediate layer in packaging, used for purposes such as fanning out or matching electrical interconnects from one device to another, or relieving any potential stress issues.
Infrared (IR)Part of the electromagnetic spectrum between the visible light range and the radar range. Used for heating operations in electronic assembly such as reflow soldering, preheating in wave soldering, etc.
Ka-bandThe Ka band (Pronounced: "Kay-A Band") covers the frequencies of 26.5 - 40 GHz. The Ka band is part of the K band of the microwave band of the electromagnetic spectrum. This symbol refers to "K-above" - in other words, the band directly above the K-band. The so-called 30/20 GHz band is used in communications satellites, uplink in either the 27.5 GHz and 31 GHz bands, and high-resolution, close-range targeting radars aboard military airplanes. Some frequencies in this radio band are used for vehicle speed detection by law enforcement.
K-type ConnectorA small type of threaded coaxial signal connector typically used in higher frequency applications. This connector is typically usable as high as 40GHz. It may be mated by an SMA connector with much lower performance.
KGBKnown Good Board
KGDKnown Good Die
LatchingIn relay or switching technology, this refers to the ability to keep the contact status in place even if power is removed from the equipment.
Latch-upA failure condition in which a transistor switches state when it is not supposed to. Often caused by nearby circuitry in a specific condition.
Leakage CurrentError current that can degrade sensitive measurements. Even high resistance paths between low current conductors and nearby voltage sources can generate significant leakage currents. Leakage in insulating material, micro-contamination on insulating surfaces, and moisture (humidity) can have catastrophic effects on picoamp and sub-picoamp (femtoamp) measurements.
LGALand Grid Array
LOCLead on Chip
LSILarge Scale Integration
LWDLong Working Distance (Objectives)
Low Level Measurements Low-level measurements in research, metrology, nanotechnology, superconductivity, and other low-voltage and low resistance applications require a special breed of test equipment.
MatrixAn arrangement of signal circuits in which input buses are represented by parallel vertical lines and output buses as overlapping horizontal lines (or vice versa), forming a grid-like array. Crosspoint switches at each crossing point connect inputs to outputs. Also referred to as a switching array, or crosspoint switch. (As in switching matrix).
Multi-Chip Module (MCM)A circuit comprised of two or more silicon devices (IC) mounted directly to a substrate within a single component package.
Multi-Chip Package (MCP)A small enclosed module with an external form factor that matches a single chip package and typically contains two to five chips. MCPs are commonly low lead count combinations of simple IC's.
Mean Time To Failure (MTTF)MTTF is a characterization of reliability for non-repairable systems. It is the mean time expected until the first failure of a part of the system. MTTF is a statistical value and is supposed to be the mean over a long period of time and large number of units.
Mean Time Between Failure (MTBF)A theoretical period of time between failures in equipment based on stresses in environment, temperature, levels of quality and other parameters.
Mean Time To Repair (MTTR)A theoretical period of time needed to repair a piece of equipment given certain circumstances.
MELFMetal Electrode Leadless Face
Micro Electro Mechanical Systems (MEMS)The technology of the very small, and merges at the nano-scale into nano electro mechanical systems (NEMS) and nanotechnology.
MLBMulti-Layered Board
Multi-Layered Printed Wiring Board (MLPWB)A multi-layer board formed by sequentially laminating single and double sided circuit panels (interlayers). The interlayers are interconnected with interstitial via holes and / or through-hole connections.
Monolithic Microwave Integrated Circuits (MMIC)A type of integrated circuit (IC) device that operates at microwave frequencies (300 MHz to 300 GHz).
NoiseAny unwanted electronic signal, or an unwanted audible sound (from fans or cooling devices).
OLBOuter Lead Bonding
Open-Cavity Package (OCP)Packages that have been fabricated in advance with an open cavity to accept a MEMS or IC chip as a fast turn-around and cost-effective packaging solution for prototyping, sampling, and low-volume production. Open access to the chip within the package enables special inspection, testing, probing, and even repair. OCP options include QFP, BGA and other package types which match the standard packages from those families.
P/IPackaging and Interconnection
Path ResistanceThe resistance of a complete signal path, including the switching element's contact resistance, any PC board circuit resistance and connector terminal resistance and / or cabling. Also see Contact Resistance.
Piezoelectric CurrentsThe current caused by mechanical stress to the insulating materials or connectors. To minimise this problem in low current or voltage measurements, the stress must be removed from the insulators, and materials with a low piezoelectric effect must be used.
Propagation DelayThe specified amount of time for a signal to pass through a previously closed signal path. The delay must be considered, for example, when the signal is used to synchronize other signals, or is being used in a Clock / Data configuration. This is due to both the electrical length of the signal path, and any active components in the signal path.
PACPad Array Carrier
PassivationThe formation of an insulation layer over the surface of a microelectronic element to serve as a barrier to further oxidation or corrosion. It also protects the surface from contaminants, moisture, or particles.
PBGAPlastic Ball Grid Array
PCBPrinted Circuit Board
PCBAPrinted Circuit Board Assembly
PCHProbe Card Holder
PGAPin Grid Array
Pin to PadA process that automatically aligns a probe card to the DUT. Required for vertical probe card technologies.
Pin-OutFor electronic components, a diagram showing the relations between connecting pins and internal components.
PlatenThe flat surface of the prober used to mount individual manipulators or a probe card.
PLCCPlastic Leaded Chip Carrier
Pick and Place (PNP)A programmable machine usually utilising a robot arm which picks up components from an automatic feeder, moves to a specified location on a carrier, wafer frame or PCB, and places or inserts the component onto or into the correct location.
Probe CardA probe card is an interface between an electronic test system and a semiconductor wafer or other device. Its purpose is to provide an electrical path between the test system and the circuits on the wafer, thereby permitting the testing and validation of the circuits at the wafer level, usually before they are diced and packaged. It consists, normally, of a printed circuit board (PCB) and some form of contact elements, usually metallic, but possibly of other materials as well. Probe cards are broadly classified into needle type, vertical type, and MEMS (Micro Electro-Mechanical System) type depending on shape and forms of contact elements. MEMS type is the most advanced technology currently available. The most advanced type of probe card currently can test an entire 12" wafer with one touchdown.
Probe System for Life (PS4L)A unique modular system for configuring and upgrading test systems.
PWBPrinted Wiring Board
Process Window Index (PWI)A versatile indicator of the robustness of a process, by calculating, on a percentage scale, how the entire process is operating relative to all applicable Specification Limits. This indicates how much deviation in the process can occur before defects are generated.
Quality Factor (Q-factor)A figure of merit for assessing the performance or quality of a resonator, the quality factor is a measure of energy loss or dissipation per cycle as compared to the energy stored in the fields inside the resonator. It is defined as the ratio of the reactance to the effective series resistance of a component at resonance. For example, a MEMS resonator with a high Q-factor has a sharp, large magnitude, well-defined peak in the resonance curve.
Quad Flat Package (QFP)A microelectronic package with leads extending from each of its four sides. It is used primarily for surface mounting and its variations include Low-Profile QFP (LQFP) and Thin QFP (TQFP).
RepeatabilityRepeatability is the ability of the device to move from any position to an exact designated point. The error in movement is Repeatability error.
ResolutionResolution is the smallest incremental step size the device is capable of moving. Ex: If the stage on a prober is capable of moving 1cm or greater the resolution is said to be 1cm.
RFRadio Frequencies
Return LossA measure of the undesirable signal reflections from an imperfectly-terminated transmission line. Expressed in dB. Also see VSWR.
Scanning Probe Microscope (SPM)Creates images of two dimensional surfaces by scanning a sharp tip (the probe) over a surface.
Scanning Tunnelling Microscope (STM)A type of SPM able to image and topographically map, to atomic accuracy, surfaces that conduct electricity.
Spurious-Free Dynamic Range (SFDR)SFDR is a specification for an ADC used in a communications application. The SFDR of an ADC is defined as the ratio of the rms signal amplitude to the rms value of the peak spurious spectral content (measured over the entire first Nyquist zone, dc to fs/2). SFDR is generally plotted as a function of signal amplitude and may be expressed relative to the signal amplitude (dBc) or the ADC full-scale (dBFS).
Sheet ResistanceThe electrical resistance of thin sheet of a material with uniform thickness as measured across opposite sides of a unit square pattern. It is expressed in ohms per square.
SIRSurface Insulation Resistance
Settle TimeThe time required for establishing relay connections and stabilising user circuits. For relay contacts, this includes contact bounce.
SMB/SMCTypes of small coaxial signal connectors typically used in high frequency applications. SMC threads to the mating connector while the SMB snaps to the mating connector.
ShieldingA metal enclosure or gasket for a circuit, or a metal shield surrounding wire conductors (coaxial or triaxial cable), to lessen interference, interaction, or current leakage. The shield is usually grounded.
Signal to Noise Ratio (SNR)Signal-to-noise ratio (often abbreviated SNR or S/N) is an electrical engineering measurement, also used in other fields (such as scientific measurement or biological cell signalling), defined as the ratio of a signal power to the noise power corrupting the signal. A ratio higher than 1:1 indicates more signal than noise.
Spectral ResolutionThe capability of an optical system to distinguish different frequencies.
System-on-Chip (SoC)A large, complex silicon integrated-circuit with high functionality and performance. Often characterised by the presence of embedded processors, memory, and a multiple number of other components
System-on-Package (SoP)Refers to the integration of a wide variety of component types (such as RF, digital, analog, optical and MEMS) in one package to achieve system-level functions. It uses thin-film component technology and is often built on a multi-layer package substrate by lateral and vertical integration to achieve a multi-function system-level package. It goes further than System-in-Package (SiP) by incorporating multi-domain components based on materials beyond silicon. It can include systems-on-chips (SoC), SiP, multi-chip module (MCM) and 3D chip-stacking for both IC and package integration as well incorporate multi-domain devices such as sensors, optoelectronics, RF and MEMS (including Bio-MEMS, microfluidics, etc) components for system level integration.
System-in-Package (SiP)SiP refers to multiple silicon chips enclosed in a single package or module to perform essentially the functions of a system. Examples of chips integrated in the package include processors, memories, wireless communications, RF-MEMS and discrete passive components. SiPs are typically used inside a mobile phone, digital music player, etc.
StageThe motion control system for moving a wafer chuck, packaged part holder or microscope on a probe station. Stages may offer X, Y, Z and Theta control.
SOICSmall Outline Integrated Circuit
SSMAMicro-miniature coaxial connectors with excellent electrical performance up to 26 GHz.
Surface Mount Assembly (SMA)A small type of threaded coaxial signal connector typically used in higher frequency applications. This connector is typically usable to 26GHz.
TBGATape Ball Grid Array
TNCA threaded type of BNC coaxial connector.
Triaxial CableA cable with three conductors: one conductor surrounded by an inner shield and an isolated outer shield. Generally, the inner shield is connected to a guard potential and the outer shield to signal LOW or ground.
TriggerAn external stimulus that initiates one or more instrument functions. Trigger stimuli include: a front panel button (TAKE), an external input voltage pulse.
TSSOPThin Shrink Small Outline Package
Twinaxial CableA cable with three conductors: one twisted pair of conductors surrounded by an outer shield.
TSOPThin Small Outline Package
UUTAn abbreviation for Unit Under test. Also see DUT (Device Under Test).
ULWDUltra Long Working Distance (Objectives)
Voltage Standing Wave Ratio (VSWR)The loss due to the mismatch introduced into the signal by the load or source signal path characteristics. Expressed as a ratio of the highest voltage to the lowest voltage found in the signal. Also expressed as Return Loss in dB. The Return Loss expression is the more modern term.
WaferA thin, circular piece of silicon, glass, sapphire or other substrate material onto which the integrated circuits or MEMS devices are fabricated. A wafer normally consists of an array of multiple devices which is referred to as a chip, or die, after separation from the wafer.
WISWafer Inspection System (also known as AOI)
Wafer-Level Chip-Scale Package (WLCSP)WLCSPs are chip-scale microelectronic packages that are processed at the wafer level to form a fine-pitch I/O format which can be tested and surface mounted on a printed circuit board. For example, in one approach, a dielectrically-isolated redistribution layer connected to the die pads is created on the wafer and followed by the formation of solder ball bond pads, resulting in a package very close to the size of the silicon die.
Wafer-Level Packaging (WLP)The technology of packaging an integrated circuit or a MEMS device at wafer level as oppose to the traditional packaging of individual device after wafer dicing. WLP accomplishes device interconnection and protection at wafer level involving processes such as interconnect redistribution layer, bumping, encapsulated metal conductors or wire bonding, through-silicon-via, wafer bonding, etc. WLP for MEMS such as imaging sensors and micro-mirror arrays has potential for cost reduction, size shrinkage and performance enhancement.
Wafer Level Reliability (WLR)A process for determining the expected life cycle of a product while that product is still on the wafer. This improves reliability time to data to quickly isolate any product exhibiting a high infant mortality rate.
YieldA measure of manufacturing efficiency expressed as the percentage of acceptable production units obtained from a specified manufacturing process. For example, die yield is the percentage of acceptable die compared to the total number of die on a processed wafer.

For more information on SemiProbe Probe Stations – Wafer Probing Equipment, please click HERE.





Chris Valentine


08 June 2020


IKB043 Rev. 1