Tag Archives: Conference

Lithography Conference – Making things better

30th November 2019

With some 90 visitors attending from industry and academia, the inaugural SUSS MicroTec sponsored “UK Lithography Conference”, held on 4th July 2019, had an over-arching theme of ‘productivity and efficiency’ and was a resounding success.

Hosted by Rutherford Appleton Laboratory, the conference was split into three sessions, the first of which was entitled ‘Surface Preparation’, which began with sound advice on substrate selection. For this, Ian Burnett of Inseto, had a clear message: quality lithography depends heavily on quality wafers. Though SEMI standards exist for wafer thickness tolerances, flatness, surface roughness etc. for repeat runs, and to ensure consistent results, there is no substitute for using wafers from the same ingot, supplied in the order in which they were sliced.

Next in the session, Joost Driven and Dominique Bouwes of Micronit Mictrotechnologies discussed material structures, focussing on the benefits of polymer and the associated challenges of processing it; challenges that include ensuring a crack-free surface, structural accuracy (i.e. dimensions of features), cleanliness (of channels, trenches and holes) and adhesion. Figure 1 shows how cracks can form.

Processing SU-8 as presented at the UK Lithography Conference 2019.
Figure 1 – Cracks can form due to a release in tensile stress in the resist layer.

Driven and Bouwes than gave examples of polymer-based devices; a bio chip for life sciences and a MEMS-based hair flow sensor.

The first session concluded with Tim Bruchmueller, Product Manager 200mm coaters, of SUSS MicroTec discussing recent developments with coating technologies in the SUSS camp. Using the just-launched SUSS ACS 200 GEN3 LabCluster coater and developer as an example, and without being overly sales-pitchy, Bruchmueller explained how, for example, developments around the resist bottle (which is inverted) reduce the risk of getting air into the dispensers.

Figure 2 – Greater energy efficiency plus other benefits using the Peltier Effect

Also, by taking advantage of the Peltier-Effect (as exhibited by some semiconductors) means positive or negative temperature differentials can be created for heating or cooling purposes. Where cooling is concerned this means no need for compressors (and their associated vibrations) and refrigerant liquids. Perhaps the biggest benefit is a lower electricity bill, as reflected in figure 2.

Second Session

The theme for this session was Exposure, and Dr. Marc Hennemeyer, Director of SUSS MicroTec’s Application Centre for Lithography, started proceedings by giving a presentation on MEMS processing challenges. These include needing consistent processing for different types of substrate material (Si, SiO2, LiTa, ceramics etc.) and the popularity of material stacks (for example, Si-based CMOS device wafers on top of mechanical device wafers).

When forming relatively large features on substrates with high topographies, large exposure gaps are caused. However, this can lead to reduced side wall angles. Also, steppers cannot achieve sufficient process results due to their limited depth of focus (DOF). In this respect, Dr. Hennemeyer proposed Fresnel Zone Plate (FZP) processing as a solution, describing FZP as, in essence, a diffractive lens. The process, which is generally for feature sizes greater than 2um, is somewhat removed from traditional proximity lithography.

A diagram Dr. Hennemeyer talked around is reproduced here as figure 3. It compares the DOF of a traditional mask used to make a hole versus an FZP.

Fresnel Zone Plate Lithography
Figure 3 – Above, a comparison of traditional mask and the Fresnel Zone Plate used to create identical features (etched holes).

With reference to the above diagram, in the top left we have a round hole in a mask. To the right, we have a prediction of the light intensity when projected through the mask. The DOF is relatively close to the mask. Below that, on the left, we have an FZP mask. The pattern is larger and more complex, requiring polarity changes in the rings, but the DOF is greater (and further away from the mask).

Dr. Hennemeyer held the floor to give a follow-on presentation about improving proximity imaging quality using diffractive elements. A key point made concerned the use of optical proximity correction (OPC) and the inclusion of features on the source mask that are not meant to be printed. Rather they are present to ‘influence’ the shape that will be printed. For example, the rounding effect means that a square in the mask might produce something closer to a circle. However, the presence of features (smaller squares) to ‘re-enforce’ the corners can result in the printing of a much better square; subject to the size of the smaller squares and their distance from the main square on the mask. See figure 4.

OPC - Optical Proximity Correction for semiconductor lithography using SUSS Mask Aligner equipment.
Figure 4 – Optical proximity correction can be used to combat rounding effects and print shapes much closer to requirements.

However, OPC on mask aligners is more challenging than on steppers. Simulation provides considerable benefits though according to Dr. Hennemeyer, who went on to recount the developments of a joint SUSS/GenISys project. Findings to date reveal that light source stability and reliable gap settings are key to implementing OPC, which helps in the creation of ‘sharper’ features and steep side walls.

SUSS MicroTec kept the floor for the next presentation, as Christof Kronseder gave an overview of UV LED light sources and recounted a number of developments that have taken place during recent years. The advantages of LED over traditional mercury lamps include lower running costs (during use and by virtue of not requiring a warm-up) and reduced cooling requirements. Kronseder recounted that SUSS began its LED journey with an alternative for 350W mercury lamps and is currently working on a 1kW system.

Third Session

This session was themed ‘Imprint / Applications’ and began with a presentation from Dr. Simon Drieschner, an Applications Engineer with SUSS MicroTec, on solutions for micro and nano imprinting, using substrate conformal imprint lithography (SCIL) and SUSS’s proprietary SUSS MicroTec imprint lithography equipment (SMILE) respectively (see figure 5).

Semiconductor Imprint Lithography - Presented at UK Lithography Conference 2019.
Figure 5 – Above, the SUSS MicroTec imprint lithography equipment (SMILE) process steps.

The presentation included a comparison of stamp materials from a total-cost-of-ownership perspective and factored in curing times, which are often overlooked but essential for volume manufacturing scenarios as they can vary from circa 15 minutes to more than three days. Two main materials were compared, epoxides (which are proven in the field) and hybrid acrylates (which are a relatively new development but watch this space as the benefits are considerable). See figure 6.

Figure 6 – New hybrid acrylate stamps require only a short (UV) curing time and have a long life.

The session concluded of the UK Lithography Conference was a report from academia, in the form of a presentation from Swansea University, given by Dominic Chung Man Fung and which provided an example of the SCIL process as part of an Innovate UK funded project.

The project was to develop a low cost, volume fabrication process for a wafer scale distributed feedback (DFB) laser. Challenges included feature size and shape (plus achieving steep sidewall angles), stamp [soft master] curing time, the hard master having an anti-stick layer (ASL) and, of course, attaining high yield.

Incredible results have been achieved so far on 3” wafers. For instance, an ASL for the hard master has been created using FDTS (a.k.a. Perfluorodecyltrichlorosilane – an anti-sticking process used in other technology fields) and soft stamps are exhibiting high reproducibility. The most impressive achievement however is how rapidly high yield has been attained – see figure 7.

Imprint Lithography Yield Improvements, Presented by Swansea University - UK Lithography Conference 2019.
Figure 7 – Swansea University’s wafer on wafer yield improvements awed all present at the UK Lithography Conference.

Future goals include attaining 100% yield (far from unachievable considering the results to date), scaling to 4”, 6” and 8” wafers and performing studies into the lifetime of the soft master.

UK Lithography Conference attendees.
The inaugural UK Lithography conference provided attendees with a wealth of advice on how to achieve productivity and efficiency through tool developments and new methodologies.

The inaugural UK Lithography Conference concluded with a note of thanks from Matt Brown of Inseto, the organiser of the event. Thanks went to Rutherford Appleton Laboratory for hosting the conference, to SUSS MicroTec for their sponsorship and to the speakers (most of whom had travelled in from outside the UK).

To repeat a few words from the intro of this report, the event was a resounding success. The lithography community is facing (and as the conference proved, is solving) a whole host of technical challenges amidst a backdrop of commercial pressures.

Productivity and efficiency are being realised through developments in tools and methodologies and, through networking events like the conference, ideas are being shared and further developed – which is all great news for this exciting industry.

For further information on our range of equipment for UV Lithography, please click HERE or to visit the SUSS MicroTec homepage, click HERE