Lithography at its most general
is the process of patterning the surface of a substrate to build up a complex
design or structure.
Photo (UV) Lithography
Photo (or UV) lithography is the technique of pattering through the use
of a light sensitive polymer (called photoresist) and a stencil (called a
The first step in any photolithographic process is to prepare the
substrate – in most cases the substrate is a silicon wafer but can in theory be
any material. Substrate preparation is undertaken to improve the adhesion of
the photoresist to the substrate. Typical steps include substrate cleaning – to
remove any dirt/contaminates, dehydration bake – to remove any water and then
the addition of an adhesion promoter. Going through these steps will reduce the
number of contaminates both organic and inorganic which will ensure the best
results as we move through the lithography process.
Once the substrate has been prepared the photoresist can be applied to
the surface. To get the best results a thin uniform coating is required; this
thickness is controlled through a process called spin-coating. The photoresist
is deposited onto the substrate. This is then spun on a turntable to 1000s of
rpm spreading out the viscous photoresist into a thin layer. This thin resist
is then soft-baked on a hotplate to remove excess solvent and to stabilise the
The next step in the photolithography process is to align the resist
covered substrate to the photomask and to expose to UV light. The critical
principle in photolithography is that the solubility of the photoresist is
changed once exposed to UV light. Photoresists come in two categories: positive
In a positive resist, the part of the film that is exposed to the resist
becomes more soluble and can be removed with a developer. In a negative the
opposite happens, where the resist has been exposed to light the resist becomes
harder and can’t be removed by the developer (see Figure 1d). There are many
different compositions and versions of resist, allowing for different heights,
temperatures, exposure settings and structures to be manufactured.
When aligning the substrate to the mask we use a mask aligner or a
stepper to control where the pattern on the mask is projected onto the
substrate below. A mask aligner is a faster process taking a pattern the same
size as the wafer and projecting it onto the wafer. A stepper takes a small
pattern and exposes that onto the wafer before moving the substrate a small way
and exposing the same pattern onto a different part of the wafer – replicating
the same patter over and over again.
The crucial aspect of the align and expose step is the exposure of the
photoresist with UV light. The UV source can either be a traditional broadband
mercury light or the more recent advance using a UV LED array. The UV source defines the resolution
(smallest features) of the lithography process. A rough rule of thumb is that
the resolution achievable is slightly more than half the wavelength of light.
UV light has a wavelength of ~465nm, so the resolution achieved will be ~250
Once exposed the next step is to develop the resist. The developer will
wash away either the exposed or unexposed parts of the resist film depending on
the nature of the photoresist. Development is either done as a spray, where a
fine mist of developer is sprayed onto the exposed substrate or as a puddle,
where a pool of developer is poured onto the exposed substrate. In both cases
it will remove the unwanted photoresist leaving the desired pattern.
Now the substrate is ready for the next step of the processing, either
the deposition of a thin film onto the surface of the substrate or the etching
and removal of the substrate. These techniques can be combined together with
multiple iterations of photolithography to make complex designs and patterns.
With some 90 visitors attending from industry and academia, the inaugural SUSS MicroTec sponsored “UK Lithography Conference”, held on 4th July 2019, had an over-arching theme of ‘productivity and efficiency’ and was a resounding success.
Rutherford Appleton Laboratory, the conference was split into three sessions, the
first of which was entitled ‘Surface Preparation’, which began with sound advice
on substrate selection. For this, Ian Burnett of Inseto, had a clear message: quality
lithography depends heavily on quality wafers. Though SEMI standards exist for
wafer thickness tolerances, flatness, surface roughness etc. for repeat runs,
and to ensure consistent results, there is no substitute for using wafers from
the same ingot, supplied in the order in which they were sliced.
Next in the
session, Joost Driven and Dominique Bouwes of Micronit Mictrotechnologies discussed
material structures, focussing on the benefits of polymer and the associated
challenges of processing it; challenges that include ensuring a crack-free
surface, structural accuracy (i.e. dimensions of features), cleanliness (of
channels, trenches and holes) and adhesion. Figure 1 shows how cracks can form.
Bouwes than gave examples of polymer-based devices; a bio chip for life
sciences and a MEMS-based hair flow sensor.
session concluded with Tim Bruchmueller, Product Manager 200mm coaters, of SUSS
MicroTec discussing recent developments with coating technologies in the SUSS
camp. Using the just-launched SUSS ACS 200 GEN3 LabCluster coater and developer
as an example, and without being overly sales-pitchy, Bruchmueller explained
how, for example, developments around the resist bottle (which is inverted)
reduce the risk of getting air into the dispensers.
Also, by taking advantage of the Peltier-Effect (as exhibited by some semiconductors) means positive or negative temperature differentials can be created for heating or cooling purposes. Where cooling is concerned this means no need for compressors (and their associated vibrations) and refrigerant liquids. Perhaps the biggest benefit is a lower electricity bill, as reflected in figure 2.
for this session was Exposure, and Dr. Marc Hennemeyer, Director of SUSS
MicroTec’s Application Centre for Lithography, started proceedings by giving a
presentation on MEMS processing challenges. These include needing consistent
processing for different types of substrate material (Si, SiO2,
LiTa, ceramics etc.) and the popularity of material stacks (for example,
Si-based CMOS device wafers on top of mechanical device wafers).
relatively large features on substrates with high topographies, large exposure
gaps are caused. However, this can lead to reduced side wall angles. Also,
steppers cannot achieve sufficient process results due to their limited depth
of focus (DOF). In this respect, Dr. Hennemeyer proposed Fresnel Zone Plate
(FZP) processing as a solution, describing FZP as, in essence, a diffractive
lens. The process, which is generally for feature sizes greater than 2um, is somewhat
removed from traditional proximity lithography.
A diagram Dr. Hennemeyer talked around is reproduced here as figure 3. It compares the DOF of a traditional mask used to make a hole versus an FZP.
reference to the above diagram, in the top left we have a round hole in a mask.
To the right, we have a prediction of the light intensity when projected
through the mask. The DOF is relatively close to the mask. Below that, on the
left, we have an FZP mask. The pattern is larger and more complex, requiring
polarity changes in the rings, but the DOF is greater (and further away from
Dr. Hennemeyer held the floor to give a follow-on presentation about improving proximity imaging quality using diffractive elements. A key point made concerned the use of optical proximity correction (OPC) and the inclusion of features on the source mask that are not meant to be printed. Rather they are present to ‘influence’ the shape that will be printed. For example, the rounding effect means that a square in the mask might produce something closer to a circle. However, the presence of features (smaller squares) to ‘re-enforce’ the corners can result in the printing of a much better square; subject to the size of the smaller squares and their distance from the main square on the mask. See figure 4.
on mask aligners is more challenging than on steppers. Simulation provides
considerable benefits though according to Dr. Hennemeyer, who went on to
recount the developments of a joint SUSS/GenISys project. Findings to date
reveal that light source stability and reliable gap settings are key to
implementing OPC, which helps in the creation of ‘sharper’ features and steep
SUSS MicroTec kept the floor for the next presentation, as Christof Kronseder gave an overview of UV LED light sources and recounted a number of developments that have taken place during recent years. The advantages of LED over traditional mercury lamps include lower running costs (during use and by virtue of not requiring a warm-up) and reduced cooling requirements. Kronseder recounted that SUSS began its LED journey with an alternative for 350W mercury lamps and is currently working on a 1kW system.
This session was themed ‘Imprint / Applications’ and began with a presentation from Dr. Simon Drieschner, an Applications Engineer with SUSS MicroTec, on solutions for micro and nano imprinting, using substrate conformal imprint lithography (SCIL) and SUSS’s proprietary SUSS MicroTec imprint lithography equipment (SMILE) respectively (see figure 5).
The presentation included a comparison of stamp materials from a total-cost-of-ownership perspective and factored in curing times, which are often overlooked but essential for volume manufacturing scenarios as they can vary from circa 15 minutes to more than three days. Two main materials were compared, epoxides (which are proven in the field) and hybrid acrylates (which are a relatively new development but watch this space as the benefits are considerable). See figure 6.
concluded with a report from academia, in the form of a presentation from
Swansea University, given by Dominic Chung Man Fung and which provided an
example of the SCIL process as part of an Innovate UK funded project.
was to develop a low cost, volume fabrication process for a wafer scale
distributed feedback (DFB) laser. Challenges included feature size and shape
(plus achieving steep sidewall angles), stamp [soft master] curing time, the
hard master having an anti-stick layer (ASL) and, of course, attaining high
results have been achieved so far on 3” wafers. For instance, an ASL for the
hard master has been created using FDTS (a.k.a. Perfluorodecyltrichlorosilane –
an anti-sticking process used in other technology fields) and soft stamps are
exhibiting high reproducibility. The most impressive achievement however is how
rapidly high yield has been attained – see figure 7.
Future goals include attaining 100% yield (far from unachievable considering the results to date), scaling to 4”, 6” and 8” wafers and performing studies into the lifetime of the soft master.
inaugural UK Lithography Conference concluded with a note of thanks from Matt
Brown of Inseto, the organiser of the event. Thanks went to Rutherford Appleton
Laboratory for hosting the conference, to SUSS MicroTec for their sponsorship
and to the speakers (most of whom had travelled in from outside the UK).
To repeat a
few words from the intro of this report, the event was a resounding
success. The lithography community is facing (and as the conference proved, is
solving) a whole host of technical challenges amidst a backdrop of commercial
Productivity and efficiency are being realised through developments in tools and methodologies and, through networking events like the conference, ideas are being shared and further developed – which is all great news for this exciting industry.