Semiconductor wafer selection: Silicon wafers are a thin slice of semiconducting material that is widely used in the production of electronic and micromechanical devices. They are characterised by a number of parameters, which affect their suitability and performance for a chosen task.
1. Wafer diameter
Diameter of the wafer listed in
mm. Typically wafers are talked about in inches; typical sizes are
2”,3”,4”,5”,6”,8”& 12” – with
4”,6” and 8” the most commonly used in industry and academia.
Type refers to the electrical behaviour of the wafer. Intrinsic (I), behaves as pure silicon. N-type, dominant charge carriers are electrons. P-type, dominant charge carriers are holes. Whether a wafer is P-type or N-type will affect the electrical response of any device manufactured.
3. Crystallographic Orientation
Wafers are grown as single crystals that have an ordered, regular and repeating structure. When they are sliced from the ingot the flat surface is aligned along one of several relative directions, known as the orientation. The orientation is classified by Miller indices, typical indices being (100), (110) and (111). Orientation affects the physical properties of the silicon wafer – how it is etched, ion implantation and how it integrates with other materials.
The dopant is a material that has
been deliberately implanted in the silicon to change the TYPE of the silicon.
TYPE and DOPANT are linked.
Typical N-type dopants are
Phosphorus, Arsenic, and Antimony. These all provide an extra electron to the
silicon which is then free to carry current.
Typical P-type dopants are Boron & Gallium. These have one less electron and so leave a ‘hole’ in the silicon lattice which is free to carry current.
5. Growth Method
The growth method refers to the
process by which the silicon ingot is grown. There are two main techniques:
Czochralski Zone (CZ) and Float Zone (FZ).
CZ: This is the dominant method used to grow commercial silicon
wafers due to the better resistance to thermal stress, speed of production and
low cost. CZ involves the heating a crucible of polycrystalline silicon until
it melts; then dipping a seed of single crystal silicon in and withdrawing
slowly to produce an ingot of crystalline silicon.
FZ: This is a high purity alternative to the CZ method. A polycrystalline rod of silicon and a single crystal seed are held face to face and rotated. The rod is then heated by a thin ring and the seed brought in to contact with the tip. The molten silicon orders itself into the single crystal and the heating zone is slowly moved up to extend the ingot of silicon. FZ produces higher purity and higher resistivity Si than is typically possible in CZ processes.
Grade refers to the variety in the quality of the
wafers. Typically these are PRIME, TEST and RECLAIMED.
- Prime are the highest quality and produced to
the highest tolerances on flatness, cleanliness and polish
- Test are similar to prime, except with less
rigourous specifications to flatness and cleanliness.
- Reclaimed are wafers that have been stripped
and polished of any previous patterning or processing.
There are sometimes other grades of Si
wafer mentioned but these are either synonyms of the above or have a specific
tolerance on a certain parameter.
The material is the bulk material of the wafer, typically silicon, but this may vary – some transparent substrates such as glass or quartz are needed for optical devices, and more exotic compound materials such as GaAs or InP for specific band gaps.
Resistivity is the measure of the
resistance to current flow and the movement of the charge carriers (either
holes or electrons) through the silicon. Resistivity is measured in Ohm-cm. The
dopant level can be adjusted to reach target resistivities, with higher doping
lowering the resistivity.
The thickness of the silicon wafer affects the mechanical properties and is typically expressed in µm (microns) and with a tolerance (± 20µm), The tolerance is measured through a total thickness variation (TTV).
Wafer polishing is the final step
in the manufacture of silicon wafers, which allows the production of a smooth,
super-flat mirrored surface. There are two options for polishing: single side
polish (SSP) and double side polish (DSP)
SSP: Only one face is polished, the second (the backside) is
DSP: Both faces are polished, giving a high flatness to the wafer.
11. Alignment Fiducial
Alignment fiducial refers to the flats or notches used to identify the wafer. Originally flats were used to identify TYPE and well as ORIENTATION, but now there is less convention about what the flats mean, and notches are quite common on 8” (200mm) wafers.
At Inseto, we use Other to indicate if the wafers are laser marked with a unique identifier or if they have been stacked in a particular manner.